rumpk/core
Markus Maiwald ccaa10c509 Phase 31.2: The Identity Switch (Sv39 Virtual Memory)
THE CROSSING - COMPLETE
========================

Successfully transitioned from Physical to Virtual addressing using
Sv39 page tables. The kernel now operates in a fully virtualized
address space with identity mapping (VA=PA).

ARCHITECTURE
------------

1. Sv39 Page Table Infrastructure (hal/mm.zig):
   - 3-level page tables (512 entries per level)
   - 4KB pages with proper PTE bit packing
   - Bump allocator for page table allocation
   - map_page/map_range for flexible mapping

2. Kernel Identity Map:
   - DRAM: 0x80000000-0x88000000 (RWX)
   - UART: 0x10000000 (RW)
   - VirtIO MMIO: 0x10001000-0x10009000 (RW)
   - VirtIO PCI: 0x30000000-0x40000000 (RW)
   - VirtIO BARs: 0x40000000-0x50000000 (RW)
   - PLIC: 0x0c000000-0x0c400000 (RW)

3. Boot Sequence Integration:
   - mm_init(): Initialize page allocator
   - mm_enable_kernel_paging(): Build identity map, activate SATP
   - Transparent transition - no code changes required

THE MOMENT OF TRUTH
-------------------
[MM] Building Sv39 Page Tables...
[MM] Activating Identity Map...
[MM] ✓ Virtual Memory Active. Reality is Virtual.

System continued operation seamlessly:
✓ VirtIO Block initialized
✓ SFS filesystem mounted
✓ GPU probe completed
✓ All MMIO regions accessible

STRATEGIC ACHIEVEMENT
---------------------
This is the foundation for The Glass Cage (Phase 31.3).
We can now create restricted page tables for worker fibers,
enforcing true memory isolation without MMU context switches.

Files:
- core/rumpk/hal/mm.zig: Complete Sv39 implementation
- core/rumpk/core/kernel.nim: Boot integration
- src/nexus/builder/kernel.nim: Build system integration

Next: Phase 31.3 - Worker Isolation (Restricted Page Tables)

Build: Validated on RISC-V (rumpk-riscv64.elf)
Status: Production-ready - The Sovereign ascends to Virtual Reality
2026-01-02 15:24:32 +01:00
..
fs Phase 27-29: Visual Cortex, Pledge, and The Hive 2026-01-02 14:12:00 +01:00
include Phase 27-29: Visual Cortex, Pledge, and The Hive 2026-01-02 14:12:00 +01:00
ion feat(rumpk): Phase 2 Complete - The Entropy Purge & Sovereign Alignment 2025-12-31 20:18:48 +01:00
loader feat(rumpk): Phase 8 - The Summoning (ELF Loader) - 95% Complete 2025-12-31 20:18:49 +01:00
README.md feat(rumpk): Phase 2 Complete - The Entropy Purge & Sovereign Alignment 2025-12-31 20:18:48 +01:00
channel.nim feat(rumpk): Phase 2 Complete - The Entropy Purge & Sovereign Alignment 2025-12-31 20:18:48 +01:00
cstubs.c feat(rumpk): Phase 3.5b Zicroui HUD Integration 2025-12-31 20:18:49 +01:00
fiber.nim Phase 27-29: Visual Cortex, Pledge, and The Hive 2026-01-02 14:12:00 +01:00
invariant.nim feat(rumpk): Sovereign Core Stabilization & Membrane IPC Hardening 2025-12-31 20:18:49 +01:00
ion.nim Phase 27-29: Visual Cortex, Pledge, and The Hive 2026-01-02 14:12:00 +01:00
kernel.nim Phase 31.2: The Identity Switch (Sv39 Virtual Memory) 2026-01-02 15:24:32 +01:00
loader.nim feat(rumpk): dignified exit & sovereign vfs 2025-12-31 21:54:44 +01:00
loader.zig feat(rumpk): Sovereign Core Stabilization & Membrane IPC Hardening 2025-12-31 20:18:49 +01:00
overrides.c feat(rumpk): Phase 7 Verified - Subject Zero Launch 2025-12-31 20:18:48 +01:00
panicoverride.nim feat(rumpk): First successful Zig+Nim boot on QEMU ARM64 2025-12-31 20:18:47 +01:00
re-symbol.txt feat(rumpk): Phase 7 Verified - Subject Zero Launch 2025-12-31 20:18:48 +01:00
ring.nim feat(rumpk): Phase 7 Verified - Subject Zero Launch 2025-12-31 20:18:48 +01:00
watchdog.nim feat(rumpk): Phase 3 Task 1 Complete - The Speed Freak (181 cycles/op) 2025-12-31 20:18:48 +01:00

README.md

Rumpk Core (L1)

Language: Nim
Purpose: Architecture-agnostic kernel logic

Module Index

File Purpose
kernel.nim Main Orchestrator (kmain)
ion.nim ION Control Plane & Channel API
fiber.nim Cooperative fiber abstraction
watchdog.nim Autonomous Immune System (Healer)
ring.nim Lock-free Sovereign ring buffers
panicoverride.nim Freestanding panic handler

Architecture Independence

This folder contains no architecture-specific code. All platform-specific details are handled by the HAL layer (../hal/).

Compile-time architecture selection uses Nim's when defined():

when defined(amd64):
  const CONTEXT_SIZE = 56
elif defined(arm64):
  const CONTEXT_SIZE = 96
elif defined(riscv64):
  const CONTEXT_SIZE = 112

Dependencies

  • Imports console_write, rumpk_halt from HAL (Zig L0)
  • Imports cpu_switch_to from arch-specific assembly
  • Uses mm:arc memory management (no GC)

Build

Built via ../build.sh [aarch64|x86_64|riscv64]