82e1b7c657
THE CROSSING - COMPLETE ======================== Successfully transitioned from Physical to Virtual addressing using Sv39 page tables. The kernel now operates in a fully virtualized address space with identity mapping (VA=PA). ARCHITECTURE ------------ 1. Sv39 Page Table Infrastructure (hal/mm.zig): - 3-level page tables (512 entries per level) - 4KB pages with proper PTE bit packing - Bump allocator for page table allocation - map_page/map_range for flexible mapping 2. Kernel Identity Map: - DRAM: 0x80000000-0x88000000 (RWX) - UART: 0x10000000 (RW) - VirtIO MMIO: 0x10001000-0x10009000 (RW) - VirtIO PCI: 0x30000000-0x40000000 (RW) - VirtIO BARs: 0x40000000-0x50000000 (RW) - PLIC: 0x0c000000-0x0c400000 (RW) 3. Boot Sequence Integration: - mm_init(): Initialize page allocator - mm_enable_kernel_paging(): Build identity map, activate SATP - Transparent transition - no code changes required THE MOMENT OF TRUTH ------------------- [MM] Building Sv39 Page Tables... [MM] Activating Identity Map... [MM] ✓ Virtual Memory Active. Reality is Virtual. System continued operation seamlessly: ✓ VirtIO Block initialized ✓ SFS filesystem mounted ✓ GPU probe completed ✓ All MMIO regions accessible STRATEGIC ACHIEVEMENT --------------------- This is the foundation for The Glass Cage (Phase 31.3). We can now create restricted page tables for worker fibers, enforcing true memory isolation without MMU context switches. Files: - core/rumpk/hal/mm.zig: Complete Sv39 implementation - core/rumpk/core/kernel.nim: Boot integration - src/nexus/builder/kernel.nim: Build system integration Next: Phase 31.3 - Worker Isolation (Restricted Page Tables) Build: Validated on RISC-V (rumpk-riscv64.elf) Status: Production-ready - The Sovereign ascends to Virtual Reality |
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| .zig-cache/h | ||
| apps | ||
| boot | ||
| core | ||
| docs | ||
| hal | ||
| io | ||
| libs | ||
| npl | ||
| rootfs | ||
| src/npl/system | ||
| vendor/lwip | ||
| README.md | ||
| build.zig | ||
| run.sh | ||
README.md
Rumpk: The Modular Unikernel
"The Kernel is a Library. The App is the OS."
Status: EXPERIMENTAL
Languages: Zig (L0) + Nim (L1)
Design: POSIX-hostile, Military-grade
Directory Structure
rumpk/
├── boot/ [L0] Entry & Architecture (Zig/Asm)
│ ├── start.S Multiboot2/EFI entry point
│ └── arch/ Architecture-specific code
├── hal/ [L0] Hardware Abstraction (Zig)
│ ├── mm.zig Physical/Virtual Memory
│ ├── irq.zig Interrupt handling
│ ├── serial.zig UART/Early logging
│ └── abi.zig C-ABI export to Nim
├── core/ [L1] Logic (Nim)
│ ├── kernel.nim kmain() entry
│ ├── sched.nim LWKT Scheduler
│ ├── fiber.nim Fiber/Context management
│ └── ring.nim Disruptor buffer
├── sys/ [L2] ABI Glue
│ └── syscall.zig System call handlers
├── payload/ [L3] NPL/NPK Loaders
│ └── loader.nim Signature verification
└── io/ I/O Subsystem
└── governor.nim Adaptive War/Peace mode
Key Features
- Adaptive I/O: War Mode (polling) ↔ Peace Mode (interrupts)
- Disruptor Ring: Lock-free inter-fiber communication
- SipHash IDs: Collision-resistant process identification
- Ed25519: Only signed code executes
Specifications
Build (Coming Soon)
cd core/rumpk
zig build # Build L0 HAL
nimble build # Build L1 Logic