rumpk/hal/arch/riscv64/switch.S

62 lines
1.2 KiB
ArmAsm

/* MARKUS MAIWALD (ARCHITECT) | VOXIS FORGE (AI)
RUMPK HAL // RISC-V 64 CONTEXT SWITCH
RISC-V LP64 ABI Callee-Saved:
- ra (return address)
- s0-s11 (12 saved registers)
- fp (frame pointer, alias for s0)
Frame: 14 regs * 8 = 112 bytes (16-byte aligned)
*/
.global cpu_switch_to
.type cpu_switch_to, @function
# void cpu_switch_to(uint64_t* prev_sp_ptr, uint64_t next_sp);
# a0 = prev_sp_ptr
# a1 = next_sp
cpu_switch_to:
# 1. Allocate Stack (112 bytes)
addi sp, sp, -112
# 2. Save Context (ra, s0-s11, fp)
sd ra, 0(sp)
sd s0, 8(sp)
sd s1, 16(sp)
sd s2, 24(sp)
sd s3, 32(sp)
sd s4, 40(sp)
sd s5, 48(sp)
sd s6, 56(sp)
sd s7, 64(sp)
sd s8, 72(sp)
sd s9, 80(sp)
sd s10, 88(sp)
sd s11, 96(sp)
# fp is alias for s0, already saved
# 3. Save Old SP
sd sp, 0(a0)
# 4. Load New SP
mv sp, a1
# 5. Restore Context
ld ra, 0(sp)
ld s0, 8(sp)
ld s1, 16(sp)
ld s2, 24(sp)
ld s3, 32(sp)
ld s4, 40(sp)
ld s5, 48(sp)
ld s6, 56(sp)
ld s7, 64(sp)
ld s8, 72(sp)
ld s9, 80(sp)
ld s10, 88(sp)
ld s11, 96(sp)
addi sp, sp, 112
ret