rumpk

Commit Graph

Author	SHA1	Message	Date
Markus Maiwald	30fa024367	feat(rumpk): Sovereign Core Stabilization & Membrane IPC Hardening - NexShell: Hardened command transmission via atomic ION packets, fixed fragmentation issues. - NipBox: Expanded 'Sovereign Coreutils' with 'ls' and enhanced 'matrix' control. - GPU/Retina: Optimized VirtIO-GPU driver, improved polling and framebuffer synchronization. - Membrane: Stabilized libc shims (clib.c, libc.nim) and ION client logic. - Kernel: Refined fiber scheduler and watchdog metrics. - Forge: Cleanup and optimization of build scripts and manifests.	2025-12-31 20:18:49 +01:00
Markus Maiwald	46e7be6837	feat(rumpk): Phase 7 Verified - Subject Zero Launch - Implemented Sovereign Syscall Table at 0x801FFF00 - Added cooperative yielding (s_yield) for Guest/Kernel concurrency - Initialized Guest RX Ring and flows in Kernel - Bridged LwIP in Guest via net_glue and ion_client overrides - Validated TCP handshake and data transmission (Subject Zero -> Host) - Confirmed 'Hello from the Membrane!' via UART and Network	2025-12-31 20:18:48 +01:00
Markus Maiwald	3b755cac06	feat(rumpk): First successful Zig+Nim boot on QEMU ARM64 THE RUBICON IS CROSSED ====================== Rumpk v0.1 successfully boots on QEMU ARM64 virt machine. Zig L0 initializes HAL and hands off to Nim L1. BOOT OUTPUT ----------- [Rumpk L0] Stack: 16KB @ stack_bytes [Rumpk L0] UART: 0x09000000 (QEMU virt) [Rumpk L0] Handing off to Nim L1... [Rumpk L1] Memory: ARC (Deterministic) [Rumpk L1] POSIX: None (Hostile) [Rumpk L1] Status: OPERATIONAL [Rumpk L1] The Rubicon is crossed. [Rumpk L1] Zig + Nim = Sovereign Metal. IMPLEMENTATION -------------- Layer 0 (Zig): - hal/main.zig: Naked _start, stack setup, zig_entry - hal/uart.zig: PL011 UART driver for QEMU virt Layer 1 (Nim): - core/kernel.nim: kmain() entry, FFI imports from Zig - Compiled with --mm:arc --os:any for freestanding Glue (C Stubs): - core/include/: string.h, stdio.h, stdlib.h, signal.h, etc. - core/cstubs.c: memcpy, memset, strlen, printf, exit stubs - Provides minimal libc for Nim's generated C code Build System: - build.sh: Orchestrates Zig build-obj + Nim c + zig cc link - run.sh: QEMU launch script - boot/linker.ld: ARM64 linker script at 0x40080000 VERIFICATION ------------ $ qemu-system-aarch64 -M virt -cpu cortex-a57 -nographic -kernel build/rumpk.elf → Successfully prints L0 and L1 banners → Enters idle loop (wfi instruction) NEXT STEPS ---------- Phase 2: Simple bump allocator for Nim heap Phase 3: Two-fiber context switch (Ping/Pong) Phase 4: NPL loading with Ed25519 verification Phase 5: VisionFive 2 RISC-V hardware boot This proves: POSIX is optional. GCC is optional. Zig + Nim = Sovereign Metal.	2025-12-31 20:18:47 +01:00

Author

SHA1

Message

Date

Markus Maiwald

30fa024367

feat(rumpk): Sovereign Core Stabilization & Membrane IPC Hardening

- NexShell: Hardened command transmission via atomic ION packets, fixed fragmentation issues.
- NipBox: Expanded 'Sovereign Coreutils' with 'ls' and enhanced 'matrix' control.
- GPU/Retina: Optimized VirtIO-GPU driver, improved polling and framebuffer synchronization.
- Membrane: Stabilized libc shims (clib.c, libc.nim) and ION client logic.
- Kernel: Refined fiber scheduler and watchdog metrics.
- Forge: Cleanup and optimization of build scripts and manifests.

2025-12-31 20:18:49 +01:00

Markus Maiwald

46e7be6837

feat(rumpk): Phase 7 Verified - Subject Zero Launch

- Implemented Sovereign Syscall Table at 0x801FFF00
- Added cooperative yielding (s_yield) for Guest/Kernel concurrency
- Initialized Guest RX Ring and flows in Kernel
- Bridged LwIP in Guest via net_glue and ion_client overrides
- Validated TCP handshake and data transmission (Subject Zero -> Host)
- Confirmed 'Hello from the Membrane!' via UART and Network

2025-12-31 20:18:48 +01:00

Markus Maiwald

3b755cac06

feat(rumpk): First successful Zig+Nim boot on QEMU ARM64

THE RUBICON IS CROSSED
======================

Rumpk v0.1 successfully boots on QEMU ARM64 virt machine.
Zig L0 initializes HAL and hands off to Nim L1.

BOOT OUTPUT
-----------
[Rumpk L0] Stack: 16KB @ stack_bytes
[Rumpk L0] UART: 0x09000000 (QEMU virt)
[Rumpk L0] Handing off to Nim L1...
[Rumpk L1] Memory: ARC (Deterministic)
[Rumpk L1] POSIX: None (Hostile)
[Rumpk L1] Status: OPERATIONAL
[Rumpk L1] The Rubicon is crossed.
[Rumpk L1] Zig + Nim = Sovereign Metal.

IMPLEMENTATION
--------------
Layer 0 (Zig):
- hal/main.zig: Naked _start, stack setup, zig_entry
- hal/uart.zig: PL011 UART driver for QEMU virt

Layer 1 (Nim):
- core/kernel.nim: kmain() entry, FFI imports from Zig
- Compiled with --mm:arc --os:any for freestanding

Glue (C Stubs):
- core/include/: string.h, stdio.h, stdlib.h, signal.h, etc.
- core/cstubs.c: memcpy, memset, strlen, printf, exit stubs
- Provides minimal libc for Nim's generated C code

Build System:
- build.sh: Orchestrates Zig build-obj + Nim c + zig cc link
- run.sh: QEMU launch script
- boot/linker.ld: ARM64 linker script at 0x40080000

VERIFICATION
------------
$ qemu-system-aarch64 -M virt -cpu cortex-a57 -nographic -kernel build/rumpk.elf
→ Successfully prints L0 and L1 banners
→ Enters idle loop (wfi instruction)

NEXT STEPS
----------
Phase 2: Simple bump allocator for Nim heap
Phase 3: Two-fiber context switch (Ping/Pong)
Phase 4: NPL loading with Ed25519 verification
Phase 5: VisionFive 2 RISC-V hardware boot

This proves: POSIX is optional. GCC is optional. Zig + Nim = Sovereign Metal.

2025-12-31 20:18:47 +01:00

3 Commits