Markus Maiwald
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3b755cac06
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feat(rumpk): First successful Zig+Nim boot on QEMU ARM64
THE RUBICON IS CROSSED
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Rumpk v0.1 successfully boots on QEMU ARM64 virt machine.
Zig L0 initializes HAL and hands off to Nim L1.
BOOT OUTPUT
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[Rumpk L0] Stack: 16KB @ stack_bytes
[Rumpk L0] UART: 0x09000000 (QEMU virt)
[Rumpk L0] Handing off to Nim L1...
[Rumpk L1] Memory: ARC (Deterministic)
[Rumpk L1] POSIX: None (Hostile)
[Rumpk L1] Status: OPERATIONAL
[Rumpk L1] The Rubicon is crossed.
[Rumpk L1] Zig + Nim = Sovereign Metal.
IMPLEMENTATION
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Layer 0 (Zig):
- hal/main.zig: Naked _start, stack setup, zig_entry
- hal/uart.zig: PL011 UART driver for QEMU virt
Layer 1 (Nim):
- core/kernel.nim: kmain() entry, FFI imports from Zig
- Compiled with --mm:arc --os:any for freestanding
Glue (C Stubs):
- core/include/: string.h, stdio.h, stdlib.h, signal.h, etc.
- core/cstubs.c: memcpy, memset, strlen, printf, exit stubs
- Provides minimal libc for Nim's generated C code
Build System:
- build.sh: Orchestrates Zig build-obj + Nim c + zig cc link
- run.sh: QEMU launch script
- boot/linker.ld: ARM64 linker script at 0x40080000
VERIFICATION
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$ qemu-system-aarch64 -M virt -cpu cortex-a57 -nographic -kernel build/rumpk.elf
→ Successfully prints L0 and L1 banners
→ Enters idle loop (wfi instruction)
NEXT STEPS
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Phase 2: Simple bump allocator for Nim heap
Phase 3: Two-fiber context switch (Ping/Pong)
Phase 4: NPL loading with Ed25519 verification
Phase 5: VisionFive 2 RISC-V hardware boot
This proves: POSIX is optional. GCC is optional. Zig + Nim = Sovereign Metal.
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2025-12-31 20:18:47 +01:00 |
Markus Maiwald