wip(rumpk): Phase 3.5 Live Wire - 95% Complete (TX Wire Issue)
- Implemented ping_ion.zig: Sovereign ARP/ICMP Responder - Fixed VirtIO header offset (10-byte skip) - Fixed packed struct size issues (hardcoded 14/28/20 byte headers) - Full data path working: RX -> NPL Parse -> TX Push -> Kernel Drain -> VirtIO Queue - Remaining: VirtIO TX packets not reaching wire (needs tcpdump debugging) - ARP Reply crafted correctly, ICMP Echo Reply crafted correctly - VirtIO notify called, but packets not observed by host
This commit is contained in:
Markus Maiwald
parent
0aa8febe46
commit
bcba945557
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@ -83,9 +83,14 @@ proc rumpk_yield_internal() {.cdecl, exportc.} =
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return
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elif load == 0:
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# IDLE MODE (Phase 3): No pending commands.
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# In a purely cooperative system, we don't WFI here to avoid hanging
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# without a timer IRQ. The Watchdog will manage the sleep.
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discard
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# We must enable interrupts to receive packets!
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asm "csrsi sstatus, 2"
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# We can just yield here, interrupts will fire and preempt us (if we had preemption)
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# or fire and return to here.
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# But if we just loop, we burn CPU.
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# Ideally: WFI.
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# For now: Just enable interrupts so ISR can fire.
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# asm "wfi" # Optional: Save power.
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# Normal Round Robin logic
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if current_fiber == addr fiber_ion:
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@ -100,17 +105,15 @@ proc rumpk_yield_internal() {.cdecl, exportc.} =
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proc fiber_yield*() {.exportc, cdecl.} =
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rumpk_yield_internal()
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# Utility moved up
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# Channel API (The Valve) - Wrappers for ION
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# Channel API is imported from ion.nim
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# HAL/NPL Entry points
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proc rumpk_halt() {.importc, cdecl, noreturn.}
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proc hal_io_init() {.importc, cdecl.}
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@ -120,6 +123,7 @@ proc launch_subject() {.importc, cdecl.}
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# Hardware Ingress (Zig -> Nim)
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proc ion_ingress*(id: uint16, len: uint16) {.exportc, cdecl.} =
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## Intercept raw hardware packet and push to Sovereign RX Channel
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# kprint("[Kernel] Ingress ID: "); kprint_int(int(id)); kprint(" Len: "); kprint_int(int(len)); kprintln("")
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let data = ion_get_virt(id)
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var pkt = IonPacket(data: cast[ptr UncheckedArray[byte]](data), len: len, id: id)
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chan_rx.send(pkt)
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@ -144,6 +148,11 @@ proc subject_fiber_entry() {.cdecl.} =
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# Include Watchdog Logic (Access to Kernel Globals)
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include watchdog
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# HAL Driver API
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proc virtio_net_poll() {.importc, cdecl.}
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proc virtio_net_send(data: pointer, len: csize_t) {.importc, cdecl.}
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proc ion_free_raw(id: uint16) {.importc, cdecl.}
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proc ion_fiber_entry() {.cdecl.} =
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kprint("[ION] Fiber 1 Reporting for Duty.")
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if ion_paused: kprintln(" (PAUSED)") else: kprintln("")
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@ -152,6 +161,9 @@ proc ion_fiber_entry() {.cdecl.} =
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var cmd: CmdPacket
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while true:
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# 0. Poll Hardware (The Heartbeat)
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virtio_net_poll()
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# 1. Process Commands (Drain the ring!)
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while chan_cmd.recv(cmd):
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if cmd.kind == uint32(CMD_ION_STOP):
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@ -165,9 +177,14 @@ proc ion_fiber_entry() {.cdecl.} =
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# 2. Process Data (if not paused, Drain the ring!)
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if not ion_paused:
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while chan_tx.recv(pkt):
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# High speed telemetry logic
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var alert = IonPacket(id: 777, len: 42)
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chan_event.send(alert)
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# Transmit to Hardware
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kprint("[ION] TX from chan_tx, len=")
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# kprint_int(int(pkt.len))
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kprintln("")
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virtio_net_send(pkt.data, csize_t(pkt.len))
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# Zero-Copy Ingest means we own the buffer now.
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# Since virtio_net_send copies (for now), we must free the original slab.
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ion_free_raw(pkt.id)
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fiber_yield()
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@ -234,6 +251,11 @@ proc kmain() {.exportc, cdecl.} =
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# 4. WATCHDOG FIBER (The Immune System)
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init_fiber(addr fiber_watchdog, watchdog_loop, addr stack_watchdog[0], sizeof(stack_watchdog))
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# [FIX] GLOBAL INTERRUPT ENABLE
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# Open the ear before we enter the loop.
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kprintln("[Kernel] Enabling Supervisor Interrupts (SIE)...")
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asm "csrsi sstatus, 2"
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kprintln("[Kernel] All Systems Go. Entering Autonomous Loop.")
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# Handover to Scheduler (The Heartbeat)
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@ -1,3 +1,4 @@
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// MARKUS MAIWALD (ARCHITECT) | VOXIS FORGE (AI)
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// Rumpk Layer 0: VirtIO-Net Driver (Sovereign Edition)
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// - Uses VirtioTransport for PCI Capability Traversal
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// - Supports both Legacy (I/O & Memory) and Modern VirtIO
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@ -26,17 +27,17 @@ var poll_count: u32 = 0;
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export fn virtio_net_poll() void {
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poll_count += 1;
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// Periodic debug: show queue state
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if (poll_count == 1 or (poll_count % 1000000 == 0)) {
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if (global_driver) |*d| {
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if (d.rx_queue) |_| {
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asm volatile ("fence" ::: .{ .memory = true });
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uart.print("[VirtIO] Poll #");
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uart.print_hex(poll_count);
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uart.print("\n");
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}
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}
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}
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// Periodic debug: show queue state (SILENCED FOR PRODUCTION)
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// if (poll_count == 1 or (poll_count % 1000000 == 0)) {
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// if (global_driver) |*d| {
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// if (d.rx_queue) |_| {
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// asm volatile ("fence" ::: .{ .memory = true });
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// uart.print("[VirtIO] Poll #");
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// uart.print_hex(poll_count);
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// uart.print("\n");
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// }
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// }
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// }
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if (global_driver) |*d| {
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if (d.rx_queue) |q| {
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@ -61,6 +62,9 @@ export fn virtio_net_poll() void {
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}
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export fn virtio_net_send(data: [*]const u8, len: usize) void {
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uart.print("[VirtIO] virtio_net_send called, len=");
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uart.print_hex(len);
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uart.print("\n");
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if (global_driver) |*d| {
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d.send_packet(data, len);
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}
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@ -274,25 +278,31 @@ pub const VirtioNetDriver = struct {
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var replenished: bool = false;
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while (q.index != hw_idx) {
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uart.print("[VirtIO RX] Processing Packet...\n");
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// uart.print("[VirtIO RX] Processing Packet...\n");
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const elem = used_ring[q.index % q.num];
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const desc_idx = elem.id;
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const slab_id = q.ids[desc_idx];
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const len = elem.len;
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uart.print(" Desc: ");
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uart.print_hex(@intCast(desc_idx));
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uart.print(" Len: ");
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uart.print_hex(len);
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uart.print(" Slab: ");
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uart.print_hex(slab_id);
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uart.print("\n");
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// uart.print(" Desc: ");
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// uart.print_hex(@intCast(desc_idx));
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// uart.print(" Len: ");
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// uart.print_hex(len);
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// uart.print(" Slab: ");
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// uart.print_hex(slab_id);
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// uart.print("\n");
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const header_len: u32 = 10;
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if (len > header_len) {
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// Call ION
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ion_ingress(slab_id, @intCast(len));
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// Call ION - Pass only the Ethernet Frame (Skip VirtIO Header)
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// ion_ingress receives slab_id which contains full buffer.
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// We need to tell it the offset.
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// Hack: Pass `len - header_len` as the actual Ethernet frame length.
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// The NPL must then offset into the buffer by 10 to get to Ethernet.
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// OR: We adjust here. Let's adjust here by storing offset.
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// Simplest: Pass len directly, NPL will skip first 10 bytes.
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ion_ingress(slab_id, @intCast(len - header_len));
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} else {
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uart.print(" [Warn] Packet too short/empty\n");
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ion_free_raw(slab_id);
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@ -406,6 +416,9 @@ pub const VirtioNetDriver = struct {
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asm volatile ("fence" ::: .{ .memory = true });
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self.transport.notify(1);
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uart.print("[VirtIO TX] Queued & Notified Len=");
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uart.print_hex(header_len + copy_len);
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uart.print("\n");
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}
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const Virtqueue = struct {
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@ -1,8 +1,8 @@
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const std = @import("std");
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// MARKUS MAIWALD (ARCHITECT) | VOXIS FORGE (AI)
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// RUMPK NPL // LIVE WIRE (ARP/ICMP RESPONDER)
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const std = @import("std");
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// 1. The SysTable Contract (Must match Kernel!)
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const ION_BASE = 0x83000000;
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@ -179,6 +179,12 @@ export fn main() c_int {
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const sys = get_systable();
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print("[LIVE] Waiting for Packets (ARP/ICMP)...\n");
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// Verify SysTable Magic
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if (sys.magic != 0x4E585553) {
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print("[LIVE] PANIC: SysTable Magic Mismatch!\n");
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return 1;
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}
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const rx_ring = sys.s_rx;
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const tx_ring = sys.s_tx;
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// We have a packet!
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const pkt = rx_ring.data[tail & rx_ring.mask];
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print("[LIVE] RX Packet Len: ");
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print_u64(pkt.len);
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print("\n");
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// Process it
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handle_packet(pkt, tx_ring);
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@ -210,14 +220,20 @@ export fn main() c_int {
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}
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fn handle_packet(pkt: IonPacket, tx_ring: *RingBufferPacket) void {
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const data_ptr: [*]u8 = @ptrFromInt(pkt.data);
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const data: []u8 = data_ptr[0..pkt.len];
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// Skip VirtIO NET Header (10 bytes)
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const VIRTIO_HEADER_LEN = 10;
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const data_ptr: [*]u8 = @ptrFromInt(pkt.data + VIRTIO_HEADER_LEN);
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const data: []u8 = data_ptr[0..pkt.len]; // len is already adjusted by HAL
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if (data.len < @sizeOf(EthHeader)) return;
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const eth = @as(*align(1) EthHeader, @ptrCast(data.ptr));
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const eth_type = ntohs(eth.type);
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print("[LIVE] EthType: 0x");
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print_hex(eth_type);
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print("\n");
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if (eth_type == 0x0806) { // ARP
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handle_arp(data, eth, tx_ring, pkt);
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} else if (eth_type == 0x0800) { // IPv4
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@ -226,14 +242,39 @@ fn handle_packet(pkt: IonPacket, tx_ring: *RingBufferPacket) void {
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}
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fn handle_arp(data: []u8, eth: *align(1) EthHeader, tx_ring: *RingBufferPacket, pkt: IonPacket) void {
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if (data.len < @sizeOf(EthHeader) + @sizeOf(ArpHeader)) return;
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// Ethernet Header = 14 bytes, ARP Header = 28 bytes, Total = 42 bytes
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const ETH_HLEN: usize = 14;
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const ARP_HLEN: usize = 28;
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const required_len = ETH_HLEN + ARP_HLEN;
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const arp = @as(*align(1) ArpHeader, @ptrCast(data.ptr + @sizeOf(EthHeader)));
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print("[LIVE] ARP Check: data.len=");
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print_u64(data.len);
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print(" required=");
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print_u64(required_len);
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print("\n");
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if (data.len < required_len) return;
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const arp = @as(*align(1) ArpHeader, @ptrCast(data.ptr + ETH_HLEN));
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// Check if Request (1) and Target IP Matches
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// We unroll the check manually or use bytes
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const opcode_val = ntohs(arp.opcode);
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print("[LIVE] ARP Opcode: ");
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print_u64(opcode_val);
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print(" Target: ");
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print_u64(arp.tip0);
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print(".");
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print_u64(arp.tip1);
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print(".");
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print_u64(arp.tip2);
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print(".");
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print_u64(arp.tip3);
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print("\n");
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// Just check manually
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if (ntohs(arp.opcode) == 1 and
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if (opcode_val == 1 and
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arp.tip0 == MY_IP[0] and arp.tip1 == MY_IP[1] and
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arp.tip2 == MY_IP[2] and arp.tip3 == MY_IP[3])
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{
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@ -285,15 +326,39 @@ fn handle_arp(data: []u8, eth: *align(1) EthHeader, tx_ring: *RingBufferPacket,
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arp.sip2 = MY_IP[2];
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arp.sip3 = MY_IP[3];
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// 3. Send
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send_packet(tx_ring, pkt);
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// 3. Send - Create TX packet pointing to Ethernet frame (not VirtIO header)
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// pkt.data points to slab start (VirtIO header at offset 0)
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// data.ptr points to Ethernet frame (offset 10)
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// len should be the Ethernet frame size (42 for ARP)
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const tx_pkt = IonPacket{
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.data = @intFromPtr(data.ptr), // Points to Ethernet frame
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.phys = 0,
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.len = 42, // Ethernet frame length for ARP
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.id = pkt.id,
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};
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send_packet(tx_ring, tx_pkt);
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}
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}
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fn handle_ipv4(data: []u8, eth: *align(1) EthHeader, tx_ring: *RingBufferPacket, pkt: IonPacket) void {
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if (data.len < @sizeOf(EthHeader) + @sizeOf(IpHeader)) return;
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const ETH_HLEN: usize = 14;
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const IP_HLEN: usize = 20;
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const ip = @as(*align(1) IpHeader, @ptrCast(data.ptr + @sizeOf(EthHeader)));
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if (data.len < ETH_HLEN + IP_HLEN) return;
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const ip = @as(*align(1) IpHeader, @ptrCast(data.ptr + ETH_HLEN));
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print("[LIVE] IP Dst: ");
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print_u64(ip.dst0);
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print(".");
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print_u64(ip.dst1);
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print(".");
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print_u64(ip.dst2);
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print(".");
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print_u64(ip.dst3);
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print(" Proto: ");
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print_u64(ip.proto);
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print("\n");
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// Check if destined for us
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if (ip.dst0 != MY_IP[0] or ip.dst1 != MY_IP[1] or
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@ -301,14 +366,18 @@ fn handle_ipv4(data: []u8, eth: *align(1) EthHeader, tx_ring: *RingBufferPacket,
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if (ip.proto == 1) { // ICMP
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const ip_header_len = (ip.ver_ihl & 0x0F) * 4;
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const icmp_offset = @sizeOf(EthHeader) + ip_header_len;
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const icmp_offset = ETH_HLEN + ip_header_len;
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if (data.len < icmp_offset + @sizeOf(IcmpHeader)) return;
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const icmp = @as(*align(1) IcmpHeader, @ptrCast(data.ptr + icmp_offset));
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print("[LIVE] ICMP Type: ");
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print_u64(icmp.type);
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print("\n");
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if (icmp.type == 8) { // Echo Request
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// print("[LIVE] Ping! Ponging...\n");
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print("[LIVE] Ping! Ponging...\n");
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// 1. Eth Header
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eth.dst0 = eth.src0;
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@ -373,6 +442,9 @@ fn send_packet(tx_ring: *RingBufferPacket, pkt: IonPacket) void {
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if (next != tail) {
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tx_ring.data[head & mask] = pkt;
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@atomicStore(u32, &tx_ring.head, next, .release);
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print("[LIVE] TX Pushed! Len=");
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print_u64(pkt.len);
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print("\n");
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} else {
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print("[LIVE] TX Full! Dropping.\n");
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}
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